DocumentCode :
2748943
Title :
Fault model extension for diagnosing custom cell fails
Author :
Bartenstein, Thomas ; Vandling, Gilbert
Author_Institution :
Int. Bus. Machines Corp., Endicott, NY, USA
fYear :
1997
fDate :
1-6 Nov 1997
Firstpage :
617
Lastpage :
624
Abstract :
This paper describes an extension of the standard, stuck-at fault model typically used for diagnostics. By defining stuck-at faults at all levels of a design hierarchy, diagnostic simulation has been able to succinctly identify a number of custom circuit design and modeling errors. Approximately half of these errors were not well identified by conventional diagnostics
Keywords :
application specific integrated circuits; automatic testing; cellular arrays; fault diagnosis; logic testing; custom cell fails; design errors; design hierarchy; diagnostic simulation; fault model extension; modeling errors; stuck-at fault model; Assembly; Circuit faults; Circuit simulation; Circuit synthesis; Circuit testing; Electrical fault detection; Fault detection;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Conference, 1997. Proceedings., International
Conference_Location :
Washington, DC
ISSN :
1089-3539
Print_ISBN :
0-7803-4209-7
Type :
conf
DOI :
10.1109/TEST.1997.639670
Filename :
639670
Link To Document :
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