• DocumentCode
    27493
  • Title

    Kinetics of Buffer-Related RON-Increase in GaN-on-Silicon MIS-HEMTs

  • Author

    Bisi, Davide ; Meneghini, Matteo ; Marino, Fabio Alessio ; Marcon, Denis ; Stoffels, Steve ; Van Hove, Marleen ; Decoutere, Stefaan ; Meneghesso, Gaudenzio ; Zanoni, Enrico

  • Author_Institution
    Dept. of Inf. Eng., Univ. of Padova, Padua, Italy
  • Volume
    35
  • Issue
    10
  • fYear
    2014
  • fDate
    Oct. 2014
  • Firstpage
    1004
  • Lastpage
    1006
  • Abstract
    This letter reports an extensive analysis of the charge capture transients induced by OFF-state bias in double heterostructure AlGaN/GaN MIS- high electron mobility transistor grown on silicon substrate. The exposure to OFF-state bias induces a significant increase in the ON-resistance (Ron) of the devices. Thanks to time-resolved on-the-fly analysis of the trapping kinetics, we demonstrate the following relevant results: 1) Ron-increase is temperature- and field-dependent, hence can significantly limit the dynamic performance of the devices at relatively high-voltage and high temperature (100 °C-140 °C) operative conditions; 2) the comparison between OFF-state and back-gating stress indicates that the major contribution to the Ron-increase is due to the trapping of electrons in the buffer, and not at the surface; 3) the observed exponential kinetics suggests the involvement of point-defects, featuring thermally activated capture cross section; and 4) trapping-rate is correlated with buffer vertical leakage-current and is almost independent to gate-drain length.
  • Keywords
    III-V semiconductors; MISFET; aluminium compounds; electron traps; elemental semiconductors; gallium compounds; high electron mobility transistors; leakage currents; point defects; silicon; wide band gap semiconductors; AlGaN-GaN-Si; OFF-state bias; ON-resistance; back-gating stress; buffer vertical leakage current; charge capture transients; double heterostructure MIS-high electron mobility transistor; electron trapping; point defects; temperature 100 degC to 140 degC; trapping kinetics; Aluminum gallium nitride; Charge carrier processes; Gallium nitride; Kinetic theory; Silicon; Stress; Substrates; GaN; HEMT; current collapse; dynamic RON; temperature; temperature.; trapping;
  • fLanguage
    English
  • Journal_Title
    Electron Device Letters, IEEE
  • Publisher
    ieee
  • ISSN
    0741-3106
  • Type

    jour

  • DOI
    10.1109/LED.2014.2344439
  • Filename
    6878414