Title :
An ultra high-speed FFT processor
Author :
Kai Zhong ; Hui He ; Guangxi Zhu
Abstract :
This paper presents an implementation of an ultra high-speed FFT processor which can process input data of 800MHz sample rate. In order to meet such an extremely real-time requirement, high-speed differential I/O interfaces (LVDS) and dedicated parallel-pipelined radix-8 architecture are adopted. Implemented in an FPGA device, the processor can operate at 115MHz and compute a 4096-point complex FFT in 5μs. To reduce power consumption, currently, the chip is being migrated to 0.18 μm CMOS technology.
Keywords :
CMOS integrated circuits; fast Fourier transforms; field programmable gate arrays; microprocessor chips; pipeline processing; 0.18 microns; 5E-6 s; 800 MHz; CMOS technology; FPGA device; LVDS; differential I/O interfaces; high-speed FFT processor; parallel-pipelined radix-8 architecture;
Conference_Titel :
Signals, Circuits and Systems, 2003. SCS 2003. International Symposium on
Print_ISBN :
0-7803-7979-9
DOI :
10.1109/SCS.2003.1226942
