DocumentCode
2750865
Title
Fractional phase-locked loop frequency synthesizer
Author
Stork, Milan ; Kaspar, P.
Volume
1
fYear
2003
fDate
0-0 2003
Firstpage
129
Abstract
The fractional frequency synthesizer is similar to the divide-by-N phase-locked loop (PLL) (divider in feedback path). However, the output frequency of the voltage-controlled oscillator (VCO) is not restricted to integral multiples of the reference signal only. Rather, it can also be locked to the fractional multiples, with the result of a substantial reduction of the frequency tuning step in the useful bandwidth of the PLL without reduction of its pass band. Consequently, these frequency synthesizers have both high frequency resolution and short settling time, two essential requirements for modern applications, for example, in modern radio sets. The major difficulties are spurious signals generated in fractional divider system. In this paper, the new fractional PLL frequency synthesizer with Σ-Δ modulator is described. A complete fractional PLL was simulated, constructed and measured.
Keywords
frequency synthesizers; linear network synthesis; phase locked loops; sigma-delta modulation; voltage-controlled oscillators; voltage-frequency convertors; VCO; fractional PLL; fractional divider system; fractional frequency synthesizer; frequency tuning; high frequency resolution; modern radio; phase-locked loop; reference signal; short settling time; sigma-delta modulator; spurious signals; voltage-controlled oscillator;
fLanguage
English
Publisher
ieee
Conference_Titel
Signals, Circuits and Systems, 2003. SCS 2003. International Symposium on
Print_ISBN
0-7803-7979-9
Type
conf
DOI
10.1109/SCS.2003.1226965
Filename
5731237
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