Design and implementation of a high resolution phase comparator

Author

Liao, C.S. ; Huang, Y.J. ; Chu, F.D. ; Lin, H.T. ; Lin, S.Y. ; Lin, C.C. ; Tu, K.Y.

Author_Institution

Nat. Time & Freq. Stand. Lab., Chunghwa Telecom Co. Ltd., Taoyuan, Taiwan

fYear

2012

fDate

1-6 July 2012

Firstpage

626

Lastpage

627

Abstract

This paper describes a novel scheme for a high resolution phase comparator and its applications. The phase resolution of traditional universal counter, using zero-crossing technique to count measurand, is about 1×10^-4 Hz. The proposed scheme utilities fast analog-to-digital sampler (ADS) to detect sinusoidal signal from device under test and its analyzed resolution could reach 1× 10^-6 Hz. This novel system is composed by two subsystems, including numerical controlled oscillator and integrate-and-dump subsystem.

Keywords

analogue-digital conversion; counting circuits; phase comparators; signal detection; ADS; analog-to-digital sampler; device under testing; high resolution phase comparator; integrate-and-dump subsystem; numerical controlled oscillator; resolution analysis; sinusoidal signal detection; universal counter; zero-crossing technique; Clocks; Numerical stability; Power system stability; Radiation detectors; Stability criteria; Time frequency analysis; Analog-to-digital sampler (ADS); frequency measurement; numerical controlled oscillator (NCO); phase comparator; software-defined radio (SDR); stability;

fLanguage

English

Publisher

ieee

Conference_Titel

Precision Electromagnetic Measurements (CPEM), 2012 Conference on

Conference_Location

Washington, DC

ISSN

0589-1485

Print_ISBN

978-1-4673-0439-9

Type

conf

DOI

10.1109/CPEM.2012.6251085

Filename

6251085