Title :
Evaluation of embedded RBF neural chip with back-propagation algorithm for pattern recognition tasks
Author :
Kim, Jeong-Seob ; Jung, Seul
Author_Institution :
BK21 Mechatron. Group, Chungnam Nat. Univ., Daejeon
Abstract :
This article presents the evaluation analysis of the radial function neural network embedded on an FPGA chip by experiments. The back-propagation algorithm has been embedded and tested for the feasibility for on-line learning tasks. The nonlinear pattern classification task of the XOR logic has been conducted by the designed hardware. Performances are evaluated extensively by different orders of the Taylor-Maclaurin series expansion for approximating nonlinear functions and compared with results by the MATLAB program. The effects on the performance by the nonlinear function approximation have been analyzed by experimental studies of the XOR classification task.
Keywords :
backpropagation; electronic engineering computing; field programmable gate arrays; function approximation; logic circuits; neural chips; nonlinear functions; pattern classification; radial basis function networks; FPGA chip; MATLAB program; Taylor-Maclaurin series expansion; XOR logic; back-propagation algorithm; embedded radial basis function neural chip; floating point processor; nonlinear function approximation; nonlinear pattern classification task; on-line learning tasks; pattern recognition tasks; performance evalation; Field programmable gate arrays; Function approximation; Logic design; MATLAB; Neural network hardware; Neural networks; Pattern classification; Pattern recognition; Performance evaluation; Testing; FPGA; RBF neural network; back-propagation algorithm; floating point processor;
Conference_Titel :
Industrial Informatics, 2008. INDIN 2008. 6th IEEE International Conference on
Conference_Location :
Daejeon
Print_ISBN :
978-1-4244-2170-1
Electronic_ISBN :
1935-4576
DOI :
10.1109/INDIN.2008.4618269