DocumentCode
2752378
Title
Non-invasive timing analysis of IBM G6 microprocessor L1 cache using picosecond imaging circuit analysis
Author
Polonsky, S. ; McManus, Michael ; Knebel, D. ; Steen, S. ; Sanda, P.
Author_Institution
IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
fYear
2000
fDate
2000
Firstpage
125
Lastpage
128
Abstract
The new non-invasive backside timing characterization technique, Picosecond Imaging Circuit Analysis (PICA), was applied to the identification and analysis of a race condition which occurred in an early design of the L1 cache of the S/390 microprocessor. The circuit switching activity was visualized in reconstructed slow motion videos of passing and failing conditions. An automated emission waveform extraction and analysis tool was used to perform a quantitative study of the failing condition
Keywords
hazards and race conditions; integrated circuit testing; integrated memory circuits; IBM G6 microprocessor; L1 cache; Picosecond Imaging Circuit Analysis; circuit switching; imaging circuit analysis; non-invasive backside timing; race condition; timing analysis; waveform extraction; Circuit analysis; Failure analysis; Image analysis; Image reconstruction; Microprocessors; Performance analysis; Switching circuits; Timing; Videos; Visualization;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Symposium, 2000. (ATS 2000). Proceedings of the Ninth Asian
Conference_Location
Taipei
ISSN
1081-7735
Print_ISBN
0-7695-0887-1
Type
conf
DOI
10.1109/ATS.2000.893614
Filename
893614
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