Is IDDQ testing not applicable for deep submicron VLSI in year 2011?

Author

Lu, Chih-Wen ; Su, Chauchin ; Lee, Chung Len ; Chen, Jwu-E

Author_Institution

Dept. of Electr. Eng., Da Yeh Univ., Taiwan

fYear

2000

fDate

2000

Firstpage

338

Lastpage

343

Abstract

In this work, IDDQ current for deep submicron VLSI in year 2011 is estimated with a statistical approach according to the International Technology Roadmap for Semiconductors 1999 Edition considering process variations and different input vectors. The estimated results show that the standard deviation of the IDDQ current is proportional to the square root of the circuit size and the IDDQ currents of the defect-free and the defective devices, which are of the size up to 1×10⁷ gates, are still differentiable under the condition of random process deviations and input vectors. Two new IDDQ testing schemes, which detect the defective current based on the two separate IDDQ distributions, are proposed. From the study, it is concluded that IDDQ testing is still applicable for the deep submicron VLSI for the next ten years

Keywords

CMOS integrated circuits; VLSI; integrated circuit testing; leakage currents; statistical analysis; IDDQ current estimation; IDDQ distributions; IDDQ testing; circuit size; deep submicron VLSI; input vectors; random process deviations; standard deviation; statistical approach; Circuit faults; Circuit testing; Current measurement; Fault detection; Leakage current; MOSFETs; Random processes; Semiconductor device measurement; Subthreshold current; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Test Symposium, 2000. (ATS 2000). Proceedings of the Ninth Asian

Conference_Location

Taipei

ISSN

1081-7735

Print_ISBN

0-7695-0887-1

Type

conf

DOI

10.1109/ATS.2000.893646

Filename

893646