• DocumentCode
    2753193
  • Title

    A class of sequential circuits with combinational test generation complexity under single-fault assumption

  • Author

    Inoue, Michiko ; Gizdarski, Emil ; Fujiwara, H.

  • Author_Institution
    Nara Inst. of Sci. & Technol., Japan
  • fYear
    2000
  • fDate
    2000
  • Firstpage
    398
  • Lastpage
    403
  • Abstract
    We show that the test generation problem for all single stuck-at-faults in sequential circuits with internally balanced structures is reduced into the test generation problem for single stuck-at-faults in combinational circuits. In our previous work, we introduced internally balanced structures as a class of sequential circuits with the combinational test generation complexity. However, single stuck-at-faults on some primary inputs, called separable primary inputs, corresponded to multiple stuck-at faults in a transformed combinational circuit. In this paper we resolve this problem. We show how to generate a test sequence and identify undetectability for single stuck-at-faults on separable primary inputs
  • Keywords
    automatic test pattern generation; combinational circuits; fault diagnosis; logic testing; sequential circuits; combinational test generation; combinational test generation complexity; internally balanced structures; multiple stuck-at faults; separable primary inputs; sequential circuits; single stuck-at-faults; single-fault; test sequence; undetectability; Circuit faults; Circuit testing; Combinational circuits; Electronic mail; Flip-flops; Large-scale systems; Performance evaluation; Sequential analysis; Sequential circuits; System testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Test Symposium, 2000. (ATS 2000). Proceedings of the Ninth Asian
  • Conference_Location
    Taipei
  • ISSN
    1081-7735
  • Print_ISBN
    0-7695-0887-1
  • Type

    conf

  • DOI
    10.1109/ATS.2000.893656
  • Filename
    893656