DocumentCode
2753219
Title
On-Chip TSV Testing for 3D IC before Bonding Using Sense Amplification
Author
Chen, Po Yuan ; Wu, Cheng Weu ; Kwai, Ding Ming
Author_Institution
Dept. of Electr. Eng., Nat. Tsing Hua Univ., Hsinchu, Taiwan
fYear
2009
fDate
23-26 Nov. 2009
Firstpage
450
Lastpage
455
Abstract
We present a novel testing scheme for TSVs in a 3D IC by performing on-chip TSV monitoring before bonding, using a sense amplification technique that is commonly seen on a DRAM. By virtue of the inherent capacitive characteristics, we can detect the faulty TSVs with little area overhead for the circuit under test.
Keywords
amplification; fault diagnosis; integrated circuit testing; system-on-chip; three-dimensional integrated circuits; IC bonding; capacitive characteristics; fault detection; on-chip TSV testing; sense amplification; Bonding; Circuit testing; Electrical fault detection; Fault detection; Integrated circuit testing; Monitoring; Performance evaluation; Random access memory; Three-dimensional integrated circuits; Through-silicon vias; 3D IC; Defect-Based Testing; Interconnection Test; Sense Amplifier; TSV;
fLanguage
English
Publisher
ieee
Conference_Titel
Asian Test Symposium, 2009. ATS '09.
Conference_Location
Taichung
ISSN
1081-7735
Print_ISBN
978-0-7695-3864-8
Type
conf
DOI
10.1109/ATS.2009.42
Filename
5359278
Link To Document