A general interconnection network with the consideration of locality in traffic

Author

Lin, Shun-Shii ; Lin, Ferng-Ching

Author_Institution

Dept. of Comput. Sci. & Inf. Eng., Nat. Taiwan Univ., Taipei, Taiwan

fYear

1989

fDate

17-19 May 1989

Firstpage

297

Lastpage

301

Abstract

A general interconnection network is proposed, taking into account locality of traffic. The network has log²N-log N maximum intercell delay, but when high locality occurs in the communications, the mean intercell delay decreases to O(1). The problem of how to map processors with a known traffic distribution onto the terminals of the network in order to minimize the mean intercell delay is analyzed and formulated as a quadratic assignment problem. The uses of this network as a partitioner, a permuter, a full switch and a generalized connection network is discussed

Keywords

multiprocessor interconnection networks; parallel architectures; telecommunication traffic; full switch; intercell delay; interconnection network; locality; mean intercell delay; partitioner; permuter; quadratic assignment problem; traffic; traffic distribution; Computer science; Costs; Delay; Intelligent networks; Measurement; Multiprocessor interconnection networks; Packet switching; Switches; Telecommunication traffic; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Technology, Systems and Applications, 1989. Proceedings of Technical Papers. 1989 International Symposium on

Conference_Location

Taipei

Type

conf

DOI

10.1109/VTSA.1989.68633

Filename

68633