Title :
A new pulse mode self organizing map hardware with digital phase locked loops
Author_Institution :
Dept. of Comput. Sci. & Intelligent Syst., Oita Univ., Japan
fDate :
31 July-4 Aug. 2005
Abstract :
The self-organizing map (SOM) has found applicability in a wide range of application areas. This paper proposes a new SOM hardware with phase modulated pulse signal and digital phase-locked loops (DPLLs). The system uses the DPLL as a computing element because the operation of the DPLL is very similar to that of SOM´s computation. The system also uses square waveform phase to hold the value of the each input vector element. The proposed SOM architecture is described in VHDL and its feasibility is verified by simulation. Results show that the proposed SOM has good quantization capability.
Keywords :
digital phase locked loops; hardware description languages; phase modulation; pulse modulation; self-organising feature maps; waveform analysis; VHDL; digital phase locked loop; phase modulated pulse signal; pulse mode self organizing map hardware; square waveform; Application software; Computational modeling; Computer architecture; Hardware; Neural networks; Neurons; Organizing; Phase locked loops; Phase modulation; Pulse modulation;
Conference_Titel :
Neural Networks, 2005. IJCNN '05. Proceedings. 2005 IEEE International Joint Conference on
Print_ISBN :
0-7803-9048-2
DOI :
10.1109/IJCNN.2005.1556378