DocumentCode :
2753954
Title :
A Multi-dimensional Pattern Run-Length Method for Test Data Compression
Author :
Lee, Lung-Jen ; Tseng, Wang-Dauh ; Lin, Rung-Bin ; Lee, Chen-Lun
Author_Institution :
Dept. of Comput. Sci. & Eng., Yuan Ze Univ., Chungli, Taiwan
fYear :
2009
fDate :
23-26 Nov. 2009
Firstpage :
325
Lastpage :
330
Abstract :
This paper presents a run-length-based compression method considering dimensions of pattern information. Information such as pattern length and number of pattern runs is encoded to denote the compression status. The decoder is simple and requires very low hardware overhead. Significant improvements are experimentally demonstrated on larger ISCAS´89 benchmarks.
Keywords :
data compression; integrated circuit testing; system-on-chip; SOC; multi-dimensional pattern run-length method; pattern information dimension; pattern length; pattern number; run-length-based compression method; test data compression; Circuit faults; Circuit testing; Costs; Decoding; Encoding; Hardware; Huffman coding; Integrated circuit testing; Intellectual property; Test data compression; ATE; SOC; code-based testing; pattern run-length; test data compression;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Asian Test Symposium, 2009. ATS '09.
Conference_Location :
Taichung
ISSN :
1081-7735
Print_ISBN :
978-0-7695-3864-8
Type :
conf
DOI :
10.1109/ATS.2009.49
Filename :
5359318
Link To Document :
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