DocumentCode :
275407
Title :
A hardware implementation of gridless routing based on content addressable memory
Author :
Sato, Masao ; Kubota, Kazuto ; Ohtsuki, Tatsuo
Author_Institution :
Dept. of Inf. Eng., Takushoku Univ., Tokyo, Japan
fYear :
1990
fDate :
24-28 Jun 1990
Firstpage :
646
Lastpage :
649
Abstract :
A new gridless router accelerated by content addressable memory (CAM) is presented. A gridless version of the line-expansion algorithm is implemented, which always finds a path if one exists. The router runs in linear time by means of the CAM-based accelerator. Experimental results show that the more obstacles there are in the routing region, the more effective the CAM-based approach is. The CAM-based layout engine provides the flexibility to deal with a variety of geometrical search problems for VLSI design. Another advantage is that complicated coding for sophisticated data structures depending on subproblems is not necessary
Keywords :
VLSI; circuit layout CAD; computational complexity; content-addressable storage; CAM-based accelerator; VLSI design; content addressable memory; data structures; geometrical search problems; gridless router; line-expansion algorithm; Acceleration; Associative memory; CADCAM; Computer aided manufacturing; Engines; Hardware; Linear accelerators; Routing; Search problems; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 1990. Proceedings., 27th ACM/IEEE
Conference_Location :
Orlando, FL
ISSN :
0738-100X
Print_ISBN :
0-89791-363-9
Type :
conf
DOI :
10.1109/DAC.1990.114933
Filename :
114933
Link To Document :
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