Title :
Extension of the critical path tracing algorithm
Author :
Ramakrishnan, T. ; Kinney, L.
Author_Institution :
Dept. of Electr. Eng., Minnesota Univ., Minneapolis, MN, USA
Abstract :
Critical path tracing (CPT) is an approximate algorithm used for fast fault simulation, as part of test generation algorithms. It partitions the circuit to be simulated into fanout free regions in order to simplify decisions regarding the propagation of logic signal changes through the circuit. Presented are concepts that result in faster decision making than in CPT for many combinations of input changes. After true value simulation, improved critical path tracing (ICPT) does a more extensive classification of lines than CPT does. This finer classification determines propagation of fault effects without fault simulation in many cases where CPT may require fault simulation. The increase in execution time to incorporate the improvements is insignificant compared to the savings in simulation time for many input vectors
Keywords :
logic testing; CPT; critical path tracing; fast fault simulation; fault effects; improved critical path tracing; test generation; Circuit faults; Circuit simulation; Circuit testing; Costs; Dictionaries; Electrical fault detection; Logic circuits; Logic design; Logic gates; Partitioning algorithms;
Conference_Titel :
Design Automation Conference, 1990. Proceedings., 27th ACM/IEEE
Conference_Location :
Orlando, FL
Print_ISBN :
0-89791-363-9
DOI :
10.1109/DAC.1990.114947