DocumentCode
2754408
Title
Switched capacitor PLL frequency synthesizer
Author
El-ela, M. Abou
Author_Institution
Fac. of Eng., Ain Shams Univ., Cairo, Egypt
fYear
1999
fDate
23-25 Feb 1999
Abstract
A technique for high resolution frequency synthesizer is introduced and analyzed. This technique is based on a duty cycle controlled oscillator circuit used as a fractional frequency divider placed in the feedback path of a phase locked loop. A design example is given with experimental results
Keywords
frequency dividers; frequency synthesizers; phase locked loops; phase locked oscillators; switched capacitor networks; voltage-controlled oscillators; VCO; duty cycle controlled oscillator circuit; feedback path; fractional frequency divider; high resolution frequency synthesizer; phase locked loop; switched capacitor PLL frequency synthesizer; Capacitors; Circuits; Communication switching; Communication system control; Equations; Frequency conversion; Frequency synthesizers; Phase locked loops; Timing; Voltage-controlled oscillators;
fLanguage
English
Publisher
ieee
Conference_Titel
Radio Science Conference, 1999. NRSC '99. Proceedings of the Sixteenth National
Conference_Location
Cairo
Print_ISBN
977-5031-62-1
Type
conf
DOI
10.1109/NRSC.1999.760888
Filename
760888
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