A high-speed ROM-less direct digital frequency synthesizer realized by a segmented non-linear DAC

A high-speed direct digital frequency synthesizer (DDFS) based on segmented digital-to-analog converter (DAC) is presented. In this work, a new approach to convert the digital phase information into sine amplitude is proposed such that high speed DDFS can be achieved. The DDFS has 10 bits of phase resolution and is implemented in 0.18 um CMOS technology with the die area 1.7 mm x 1.6 mm and the power consumption is about 271 mW. The simulated result of operation speed is up to 1 GHz and has spurious free dynamic range (SFDR) better than 55 dBc at low synthesized frequencies.