Title :
Heterogeneous multiprocessor on chip compiler, architecture, place and route design space exploration
Author_Institution :
ENSTA, Paris
Abstract :
Multiprocessors system on chip are strongly emerging as best candidates for complex embedded applications. Heterogeneous multiprocessors bring an added value by allowing customization of processors to match required constraints in terms or area, performance and energy consumption. This customization of processors opens up a larger design space than homogeneous multiprocessors and naturally attracts the use of additional customization at various levels. In this paper we describe the design space exploration benefits of heterogeneous multiprocessors of the combined effects of compiler, architecture and place and route. A case study of a 5 way heterogeneous multiprocessor validates our approach.
Keywords :
computer architecture; integrated circuit design; multiprocessing systems; chip compiler; computer architecture; heterogeneous multiprocessor; processors customization; route design space exploration; Computer architecture; Energy consumption; Hardware; Master-slave; Microarchitecture; Multiprocessor interconnection networks; Optimized production technology; Optimizing compilers; Space exploration; System-on-a-chip; Architecture; Compiler; Design space exploration; MPSOC;
Conference_Titel :
Electrotechnical Conference, 2008. MELECON 2008. The 14th IEEE Mediterranean
Conference_Location :
Ajaccio
Print_ISBN :
978-1-4244-1632-5
Electronic_ISBN :
978-1-4244-1633-2
DOI :
10.1109/MELCON.2008.4618468