Bus coding to minimize redundant bit transitions

This paper presents a bus coding approach to minimize power while charging and discharging of node capacitances. Previous methods aim at reducing the transitions by encoding the data and adding redundant bits. The energy saved by the previous methods was constrained due to transition activity of the extra lines appended during encoding. This paper proposes a method for minimizing the energy dissipation due to the extra bits added due to encoding by modifying the existing schemes. Experimental results prove that the improvement in power saving by the proposed modification is significant. The encoder and decoder of various coding schemes has been designed using 130 nm TSMC CMOS library and the power overhead has been reported.