DocumentCode :
2755452
Title :
New Scheme of Reducing Shift and Capture Power Using the X-Filling Methodology
Author :
Chen, Tsung Tong ; Li, Wei Lin ; Wu, Po Han ; Rau, Jiann Chyi
Author_Institution :
Dept. of Electr. Eng., Tamkang Univ., Taipei Hsien, Taiwan
fYear :
2009
fDate :
23-26 Nov. 2009
Firstpage :
105
Lastpage :
110
Abstract :
A scheme that ATPG-based technique for reducing shift and capture power during scan testing is presented without any influence on fault coverage. This paper presents an X-filling approach called adjacent backtracing fill (AB-fill). After AB-fill approach for at-speed scan testing, all of test patterns have assigned as partially-specified values with a small number of don´t care bits (x) as in test compression, and it is integrated in the ATPG algorithm to reduce capture power while feeding the first test pattern into CUT.
Keywords :
automatic test pattern generation; fault diagnosis; ATPG-based technique; X-filling methodology; adjacent backtracing fill; at-speed scan testing; capture power; fault coverage; reducing shift; scan testing; Automatic test pattern generation; Circuit faults; Circuit testing; Clocks; Controllability; Delay; Design for testability; Performance evaluation; Power dissipation; Runtime; At-Speed Scan Testing; DFT; X-Filling;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Asian Test Symposium, 2009. ATS '09.
Conference_Location :
Taichung
ISSN :
1081-7735
Print_ISBN :
978-0-7695-3864-8
Type :
conf
DOI :
10.1109/ATS.2009.48
Filename :
5359391
Link To Document :
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