• DocumentCode
    2756032
  • Title

    Cyclic Redundancy Checking (CRC) Accelerator for the FlexCore Processor

  • Author

    Azhar, Muhammad Waqar ; Hoang, Tung Thanh ; Larsson-Edefors, Per

  • Author_Institution
    Dept. of Comput. Sci. & Eng., Chalmers Univ. of Technol., Gothenburg, Sweden
  • fYear
    2010
  • fDate
    1-3 Sept. 2010
  • Firstpage
    675
  • Lastpage
    680
  • Abstract
    A proven approach to increase performance of general-purpose processors is to add hardware accelerators. In its basic configuration, the FlexCore processor has a limited set of datapath units. But thanks to a flexible datapath interconnect and a wide control word, the FlexCore datapath is explicitly designed to support integration of special units that, on demand, can accelerate certain data-intensive applications. We present the integration of a versatile accelerator for several Cyclic Redundancy Checking (CRC) keys. Furthermore, we investigate the accelerator´s impact on processor execution time and energy efficiency, using the Power Stone CRC benchmark. Our evaluation shows that the accelerated 65-nm 2.7-ns FlexCore datapath is, for example, 86% more energy and cycle efficient than a datapath lacking the CRC accelerator.
  • Keywords
    cyclic redundancy check codes; microprocessor chips; Power Stone CRC benchmark; cyclic redundancy checking accelerator; flexcore processor; general-purpose processors; Benchmark testing; Computer architecture; Hardware; Protocols; Registers; Switches; Timing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Digital System Design: Architectures, Methods and Tools (DSD), 2010 13th Euromicro Conference on
  • Conference_Location
    Lille
  • Print_ISBN
    978-1-4244-7839-2
  • Type

    conf

  • DOI
    10.1109/DSD.2010.51
  • Filename
    5615523