DocumentCode
2756049
Title
A Memetic Approach for Nanoscale Hybrid Circuit Cell Mapping
Author
Chu, Zhufei ; Xia, Yinshui ; Hung, William N N ; Wang, Lunyao ; Song, Xiaoyu
Author_Institution
Sch. of Inf. Sci. & Eng., Ningbo Univ., Ningbo, China
fYear
2010
fDate
1-3 Sept. 2010
Firstpage
681
Lastpage
688
Abstract
This paper considers a cell mapping task of CMOL, a hybrid CMOS/molecular circuit architecture. To tackle the combinatorial hurdle arising from the structural connectivity domain constraint, a memetic computing algorithm is developed. The framework takes advantage of simulated annealing based local search strategy and appropriate population based encoding manipulation. Numerical results from ISCAS benchmarks and comparison with pure genetic approach illustrate the effectiveness of the modeling and solution methodology. In terms of CPU runtime, timing delay and circuit scale, the proposed method has better performance than previous methods.
Keywords
circuit optimisation; nanotechnology; simulated annealing; CMOL; CMOS/molecular circuit architecture; CPU runtime; circuit scale; local search strategy; memetic computing algorithm; nanoscale hybrid circuit cell mapping; population based encoding manipulation; simulated annealing; structural connectivity domain constraint; timing delay; CMOS integrated circuits; Computer architecture; Genetics; Logic gates; Microprocessors; Nanowires; Tiles; mapping; memetic; nanoscale hybrid circuit; optimization;
fLanguage
English
Publisher
ieee
Conference_Titel
Digital System Design: Architectures, Methods and Tools (DSD), 2010 13th Euromicro Conference on
Conference_Location
Lille
Print_ISBN
978-1-4244-7839-2
Type
conf
DOI
10.1109/DSD.2010.22
Filename
5615524
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