DocumentCode :
2756349
Title :
Evaluation of RTD-CMOS Logic Gates
Author :
NÙnez, Juan ; Avedillo, Marìa J. ; Quintana, José M.
Author_Institution :
Centro Nac. de Microelectron., Univ. de Sevilla, Sevilla, Spain
fYear :
2010
fDate :
1-3 Sept. 2010
Firstpage :
621
Lastpage :
627
Abstract :
The incorporation of Resonant Tunnel Diodes (RTDs) into III/V transistor technologies has shown an improved circuit performance: higher circuit speed, reduced component count, and/or lowered power consumption. Currently, the incorporation of these devices into CMOS technologies (RTD-CMOS) is an area of active research. Although some works have focused the evaluation of the advantages of this incorporation, additional work in this direction is required. This paper compares RTD-CMOS and pure CMOS realizations of a set of logic gates which can be operated in a gate-level nanopipelined fashion, thus allows estimating logic networks operating frequency. Lower power-delay products are obtained for RTD/CMOS implementations.
Keywords :
CMOS logic circuits; logic gates; resonant tunnelling diodes; CMOS realizations; CMOS technology; III/V transistor technology; RTD-CMOS logic gates; circuit performance; gate-level nanopipelined fashion; higher circuit speed; logic networks operating frequency; lowered power consumption; power-delay products; reduced component count; resonant tunnel diodes; CMOS integrated circuits; Integrated circuit modeling; Inverters; Latches; Logic gates; Mobile communication; Transistors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Digital System Design: Architectures, Methods and Tools (DSD), 2010 13th Euromicro Conference on
Conference_Location :
Lille
Print_ISBN :
978-1-4244-7839-2
Type :
conf
DOI :
10.1109/DSD.2010.17
Filename :
5615536
Link To Document :
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