DocumentCode :
2756550
Title :
A Predictable Multiprocessor Design Flow for Streaming Applications with Dynamic Behaviour
Author :
Stuijk, Sander ; Geilen, Marc ; Basten, Twan
Author_Institution :
Dept. of Electr. Eng., Eindhoven Univ. of Technol., Eindhoven, Netherlands
fYear :
2010
fDate :
1-3 Sept. 2010
Firstpage :
548
Lastpage :
555
Abstract :
The design of new embedded systems is getting more and more complex as more functionality is integrated into these systems. To deal with the design complexity, a predictable design flow is needed. The result should be a system that guarantees that an application can perform its own tasks within strict timing deadlines, independent of other applications running on the system. Synchronous Dataflow Graphs (SDFGs) provide predictability and are often used to model time-constrained streaming applications that are mapped onto a multiprocessor platform. However, the model abstracts from the dynamic application behaviour which may lead to a large overestimation of its resource requirements. We present a design flow that takes the dynamic behaviour of applications into account when mapping them onto a multiprocessor platform. The design flow provides throughput guarantees for each application independent of the other applications while taking into account the available processing capacity, memory and communication bandwidth. The design flow generates a set of mappings that provide a trade-off in their resource usage. This trade-off can be used by a run-time mechanism to adapt the mapping in different use-cases to the available resource. The experimental results show that our design flow reduces the resource requirements of an MPEG-4 decoder by 66% compared to a state-of-the-art design flow based on SDFGs.
Keywords :
data flow graphs; embedded systems; multimedia systems; multiprocessing systems; dynamic application behaviour; embedded systems; predictable multiprocessor design flow; synchronous dataflow graphs; time-constrained streaming applications; Bandwidth; Decoding; Schedules; Throughput; Tiles; Timing; Transform coding; dataflow; mapping; multi-processor; throughput;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Digital System Design: Architectures, Methods and Tools (DSD), 2010 13th Euromicro Conference on
Conference_Location :
Lille
Print_ISBN :
978-1-4244-7839-2
Type :
conf
DOI :
10.1109/DSD.2010.31
Filename :
5615547
Link To Document :
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