• DocumentCode
    2756770
  • Title

    Network Processing on an SPE Core in Cell Broadband Engine

  • Author

    Kawamura, Yuji ; Yamazaki, Takeshi ; Ishiwata, Tatsuya ; Horie, Kazuyoshi ; Kyusojin, Hiroshi

  • Author_Institution
    Microprocessor Dev. Dept, Sony Comput. Entertainment Inc., Tokyo
  • fYear
    2008
  • fDate
    26-28 Aug. 2008
  • Firstpage
    119
  • Lastpage
    128
  • Abstract
    Cell Broadband Enginetrade is a multi-core system on a chip and is composed of a general-purpose power processing element (PPE) and eight synergistic processing elements (SPEs). Its high computational performance is achieved mainly through the SPE´s processing power. New high-speed NICs such as 10-Gbps Ethernet require significant amounts of processing power. Even the full processing power of PPE is insufficient to attain the maximum bandwidth on 10-Gbps Ethernet, when running Linux on Cell Broadband Engine. In order to avoid the bottlenecks of PPE processing, we implemented a NIC driver and a protocol stack on an SPE. We selected a small protocol stack that is designed for embedded systems and made size reductions to put both a protocol stack and a NIC driver onto a single SPE. Due to the size limitation of the SPE´s local storage (256-KB). As a result, the protocol processing on an SPE is almost at wire speed for UDP and about 7.5 Gbps for TCP with lightly tuned code, and it requires no assistance from the PPE while in the data transfer phase. Our work shows that the use of the SPE instead of the PPE for network processing can help resolve network performance problems that can arise from handling a high-speed NIC, including the costs of protocol processing and memory copies. The results indicate that our approach can lead to a sufficient level of transfer rate performance.
  • Keywords
    embedded systems; microprocessor chips; multiprocessing systems; Cell Broadband Engine; NIC driver; embedded systems; general-purpose power processing element; multicore system; network processing; protocol stack; synergistic processing elements; Access protocols; Bandwidth; Computer networks; Embedded system; Engines; Ethernet networks; High performance computing; Linux; Microprocessors; Processor scheduling; SPE; TCP; network; onloading;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    High Performance Interconnects, 2008. HOTI '08. 16th IEEE Symposium on
  • Conference_Location
    Stanford, CA
  • ISSN
    1550-4794
  • Print_ISBN
    978-0-7695-3380-3
  • Type

    conf

  • DOI
    10.1109/HOTI.2008.16
  • Filename
    4618584