Abstract :
A large variety of on-line testing techniques for VLSI was developed in the past and are still enriched by new developments. They can respond efficiently to the increasing complexity of VLSI circuits under the condition that available CAD tools simplify their implementation. Amongst the advanced online testing techniques are: self-checking design, allowing high quality concurrent checking by means of hardware cost drastically lower than duplication; signature monitoring, allowing low cost concurrent error detection for FSMs; on-line monitoring of reliability relevant parameters such as current, temperature, abnormal delay, signal activity during steady state, radiation dose, clock waveforms, etc.; exploitation of standard BIST or implementation of BIST techniques specific to on-line testing (Transparent BIST, Built-In Concurrent Self-Test, ...); exploitation of scan paths to transfer internal states for performing various tasks for on-line testing or fault tolerance; fail-safe techniques for VLSI, avoiding complex fail-safe interfaces using discrete components, radiation hardened designs, avoiding expensive fabrication process such as SOI, etc
Keywords :
VLSI; automatic testing; built-in self test; circuit CAD; computerised monitoring; design for testability; integrated circuit testing; VLSI; built-in concurrent self-test; clock waveforms; complexity; concurrent error detection; current measurement; delay measurement; fail-safe techniques; fault tolerance; online monitoring; online testing; radiation dose; radiation hardened design; reliability; scan paths; self-checking design; signal activity; signature monitoring; temperature measurement; transparent BIST; Automatic testing; Built-in self-test; Circuit testing; Condition monitoring; Costs; Design automation; Hardware; Radiation monitoring; Signal design; Very large scale integration;
