DocumentCode
2757136
Title
Neural network architectures for systolic arrays
Author
Shim, Chongjoon ; Cheung, John Y.
Author_Institution
Sch. of Electr. Eng. & Comput. Sci., Oklahoma Univ., Norman, OK, USA
fYear
1991
fDate
8-14 Jul 1991
Abstract
Summary form only given, as follows. The authors propose the use of an artificial neural network model to simulate the functions and operations of a systolic array. A systolic array and a neural network are both easy to implement and easy to configure. Since a neural network can be implemented on a programmable VLSI chip, it is very fast, easy to reconfigure, and cost-effective. It is concluded that a wide variety of designs of systolic arrays can easily be simulated on neural networks
Keywords
VLSI; neural nets; systolic arrays; cost effectiveness; neural network architecture; programmable VLSI chip; reconfiguration; simulation; systolic arrays; Artificial neural networks; Associative memory; Computational modeling; Computer architecture; Computer networks; Computer science; Computer simulation; Neural networks; Systolic arrays; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Neural Networks, 1991., IJCNN-91-Seattle International Joint Conference on
Conference_Location
Seattle, WA
Print_ISBN
0-7803-0164-1
Type
conf
DOI
10.1109/IJCNN.1991.155694
Filename
155694
Link To Document