A design of partitioned processor for broadband antenna array using convolution constraints

A partitioned processor consists of a fixed main beam designed with a specified frequency response in the look direction and a set of auxiliary beams to estimate and cancel undesired noise from directional interferences present in the mainbeam. This paper presents a technique to design weights of the main beam as well as the auxiliary beams using a set of linear constraints referred to as convolution constraints. The technique is easy to implement and eliminates the need of using presteering delays which are required to compensate for the axis alignment between the sensors and the look direction. It allows an array designer to specify the frequency response of the processor over the band of interest and is computationally less demanding than some existing methods.