• DocumentCode
    2758516
  • Title

    Software bit-slicing: a technique for improving simulation performance

  • Author

    Maurer, Peter M. ; Schilp, William J.

  • Author_Institution
    Dept. of Comput. Sci. & Eng., Univ. of South Florida, Tampa, FL, USA
  • fYear
    1999
  • fDate
    9-12 March 1999
  • Firstpage
    786
  • Lastpage
    787
  • Abstract
    For some types of simulation, it is difficult or impossible to improve performance by packing several vectors to be packed into a single word. One example of such an algorithm is inversion algorithm, which does not represent net values in the conventional way. This paper presents a novel technique, called software bit-slicing for performing simultaneous simulation of several input vectors on a conventional uniprocessor. As with conventional vector-packing techniques, this technique is able to assign a different input vector to each bit of a word, permitting the simultaneous simulation of n vectors, where n is the number of bits in a word. The inversion algorithm is used to give an example of this technique. For this example, a 6x speedup can be realized by using software bit-slicing. The same technique should be widely applicable to many different types of simulation.
  • Keywords
    bit-slice computers; circuit simulation; iterative methods; logic simulation; circuit simulation; input vectors; inversion algorithm; iteration; logic simulation; simulation performance; software bit-slicing; Built-in self-test; Circuit simulation; Circuit testing; Counting circuits; Discrete event simulation; Hardware; Logic; Operational amplifiers; Software algorithms; Software performance;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design, Automation and Test in Europe Conference and Exhibition 1999. Proceedings
  • Conference_Location
    Munich, Germany
  • Print_ISBN
    0-7695-0078-1
  • Type

    conf

  • DOI
    10.1109/DATE.1999.761231
  • Filename
    761231