A CMOS ultra-wideband differential low noise amplifier

This paper presents the design and simulation of a CMOS Ultra-wideband Low noise Amplifier. In the design, specific architecture decisions were made in consideration of system-on-chip implementation. The basic architecture of the LNA designed herein exhibits a differential amplifier core with active input and output impedance matching. Simulations reveal that the LNA maintains a gain of 16.7 dB with a plusmn0.3 dB ripple over the band of 3.1-6.0 GHz. Despite the use of an active input matching stage, the LNA achieved a simulated noise figure ranging from 3.0-3.5 dB over the band of operation. The input and output active matching stages maintain less than -10 dB reflection coefficients, thus successfully matching with 50Omega over the bands of 3 - 12 GHz and 3 - 17 GHz, respectively.