DocumentCode :
2759296
Title :
0.25 μm CMOS resistive ring subthreshold mixer
Author :
Wang, Xiaoyue ; Chen, Mingqi ; Boric-Lubecke, Olga
Author_Institution :
Univ. of Hawaii at Manoa, Honolulu
fYear :
2006
fDate :
12-15 Dec. 2006
Firstpage :
504
Lastpage :
507
Abstract :
This paper describes 0.25 mum CMOS resistive ring mixer operating in the subthreshold region. By applying a small gate bias, the conversion loss under low LO conditions has been improved tremendously, while the DC power dissipation is negligible. This mixer has been designed in 0.25-mum CMOS TSMC process, with a chip size of 1.24 times 0.8 mm2. It exhibits good matching characteristics and relatively low conversion loss over a wide band of 2 - 3 GHz. This mixer can be driven by LO power as low as -10 dBm, while increasing conversion loss by less than 3 dB.
Keywords :
CMOS integrated circuits; MMIC mixers; UHF integrated circuits; microwave integrated circuits; CMOS TSMC process; CMOS resistive ring subthreshold mixer; conversion loss; frequency 2 GHz to 3 GHz; matching characteristics; size 0.25 mum; small gate bias; Active noise reduction; CMOS process; Circuit topology; Linearity; Mixers; Network topology; Power dissipation; Radio frequency; Threshold voltage; Wideband; CMOS passive mixer; conversion loss; subthreshold;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microwave Conference, 2006. APMC 2006. Asia-Pacific
Conference_Location :
Yokohama
Print_ISBN :
978-4-902339-08-6
Electronic_ISBN :
978-4-902339-11-6
Type :
conf
DOI :
10.1109/APMC.2006.4429473
Filename :
4429473
Link To Document :
بازگشت