• DocumentCode
    2760251
  • Title

    3D TSV and interposer

  • Author

    Fraunhofer, J.W.

  • Author_Institution
    IZM - ASSID, Dresden, Germany
  • fYear
    2012
  • fDate
    4-6 June 2012
  • Firstpage
    1
  • Lastpage
    1
  • Abstract
    3D System Integration is one of the most significant strategic key technologies in the field of microelectronic packaging and System integration. Besides the progress in silicon technology following “Moore´s law” there is an increasing demand for highly miniaturized complex system architectures which are based on 3D SiPs. Currently different approaches are in development, which will result in complex 3D stacking approaches using TSV technology. Silicon interposer with TSV are one important element to combine different advanced devices into one miniaturized system with high functionality. The main target today is to achieve cost reduction in TSV processing and stack assembly. But nevertheless 3D WL approaches technology is one of the main technology drivers in packaging and system integration. The presentation will highlight same major aspects and current status of this technology.
  • Keywords
    integrated circuit interconnections; system-in-package; three-dimensional integrated circuits; 3D SiP; 3D TSV; 3D stacking; 3D system integration; Moore law; cost reduction; microelectronic packaging; silicon interposer; stack assembly; system-in-package; through silicon via; Assembly; Microelectronics; Packaging; Silicon; Stacking; Through-silicon vias;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Interconnect Technology Conference (IITC), 2012 IEEE International
  • Conference_Location
    San Jose, CA
  • ISSN
    pending
  • Print_ISBN
    978-1-4673-1138-0
  • Electronic_ISBN
    pending
  • Type

    conf

  • DOI
    10.1109/IITC.2012.6251585
  • Filename
    6251585