A novel integrated amorphous silicon TFT gate driver circuit with optimized design for TFT-LCD display panel manufacturing

In this work, we design and optimize a new amorphous silicon gate (ASG) driver circuit for GOP (gate-on-panel) application in medium size LCD. The circuit is composed of sixteen TFTs and one capacitor with distinct pre-charge nodes and dual low voltage levels. The design of distinct pre-charge nodes is conducive to the decrease of the charge time, and the dual low voltage level will stabilize the output waveform in off-duty periods. Biology-inspired global optimization technique is thus advanced to optimize circuit parameter for further improvement of dynamic characteristics. The optimization not only considers output characteristics but the pre-charge node voltage fluctuation, which may lead serious variation to output waveform when the temperature becomes higher. The results of our design including optimization indicate the achieved circuit performance is apparently better than an original design, where the associated sensitivity analysis is examined to assess the variation of optimized specification. The proposed new design is useful for manufacturing.