A 0.65V CMOS power amplifier for biotelemetry applications

Author

El-Desouki, Munir M. ; Deen, M. Jamal ; Haddara, Yaser M.

Author_Institution

Dept. of Electr. & Comput. Eng., McMaster Univ., Hamilton, Ont.

fYear

2005

fDate

1-4 May 2005

Firstpage

1251

Lastpage

1254

Abstract

In order to reduce the power consumption in biomedical implantable electronic systems, there is a major demand on reducing the supply voltage. This paper presents a fully integrated, 650 MHz class-E power amplifier (PA), with a class-F driver stage that is suitable for low-voltage operation. The circuit was fabricated in a standard 0.18 mum CMOS technology. Measurement results show a maximum drain efficiency of 15% and a maximum gain of 11.5 dB. When operated from a 0.65 V supply, the PA delivers an output power of 750 muW with a maximum power-added efficiency (PAE) of 10%. The circuit also has a second output to test the effects of using an on-chip filter in low-power designs. This work demonstrates the feasibility of using class-E PAs for short-range, low-power applications

Keywords

CMOS analogue integrated circuits; power amplifiers; prosthetics; 0.18 mum; 0.65 V; 10 percent; 11.5 dB; 15 percent; 650 MHz; 750 muW; CMOS power amplifier; biomedical implantable electronic systems; biotelemetry applications; class-E power amplifier; class-F driver stage; maximum power-added efficiency; on-chip filter; power consumption reduction; standard CMOS technology; supply voltage reduction; Biomedical telemetry; CMOS technology; Circuit testing; Driver circuits; Energy consumption; Implants; Integrated circuit technology; Operational amplifiers; Power amplifiers; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Electrical and Computer Engineering, 2005. Canadian Conference on

Conference_Location

Saskatoon, Sask.

ISSN

0840-7789

Print_ISBN

0-7803-8885-2

Type

conf

DOI

10.1109/CCECE.2005.1557204

Filename

1557204