Architecture of wavelet packet transform for 1-D signal

Many signal and image processing applications will be more benefited if the transform gives good spectral and temporal resolution in arbitrary regions of the time-frequency plane that is provided by the discrete wavelet packet transform (DWPT). In this paper, the architecture for lifting scheme based Daubechies 9/7 wavelet is proposed. The proposed architecture performs both forward and inverse transform. The architecture does not require any extra memory/FIFOs to store the intermediate results. The proposed architecture is verified by performing DWPT for images of size 64times64. The architecture has been described in VHDL at the RTL level and simulated successfully using ModelSim simulation environment