DocumentCode :
2761985
Title :
Test and on-line debug capabilities of IEEE Std 1149.1 in UltraSPARCTM-III microprocessor
Author :
Golshan, Farideh
Author_Institution :
Processor Product Group, Sun Microsyst. Inc., Palto Alto, CA, USA
fYear :
2000
fDate :
2000
Firstpage :
141
Lastpage :
150
Abstract :
The IEEE Std 1149.1 features have been essential in system and chip debug, test and manufacturing of UltraSPARC-III product. Several key testability features were achieved by adding a suite of customized instructions and logic to the chip core and I/Os to allow test and debug when in test mode or debug during normal operations. In addition, due to the design of high speed I/Os, extra logic was added to Boundary-Scan to maintain compliancy and provide support for all test and debug features. This paper discusses the above features and their logic implementations
Keywords :
IEEE standards; boundary scan testing; computer debugging; integrated circuit testing; logic testing; microprocessor chips; IEEE 1149 standard; UltraSPARC-III microprocessor; boundary scan testing; high-speed I/O; logic testing; on-line debugging; Bandwidth; Clocks; Logic design; Logic testing; Manufacturing processes; Microprocessors; Registers; Sun; System testing; Technological innovation;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Conference, 2000. Proceedings. International
Conference_Location :
Atlantic City, NJ
ISSN :
1089-3539
Print_ISBN :
0-7803-6546-1
Type :
conf
DOI :
10.1109/TEST.2000.894201
Filename :
894201
Link To Document :
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