Title :
Improving Delta-IDDQ-based test methods
Author_Institution :
Dept. of Electr. Eng., Ecole de Technol. Superieure, Monteal, Que., Canada
Abstract :
This paper is part of our ongoing effort to replace IDDQ testing. We analyze the effect of process drifting based on Sematech Project S121 data, and present a simple and efficient way to deal with these phenomena, when using a previously proposed test procedure based on Delta IDDQ histograms. We also analyze the different variance sources in the same context. Following this analysis, we propose and validate an innovative strategy for test optimization based on the use of current test vectors (patterns) with a shorter settling time and on the concept of Delta IDDQ partitioning. These new results and developments confirm the pertinence of our variance reduction strategy and reveal new possibilities in terms of test optimization targeting either a better test quality or a shorter current test time
Keywords :
integrated circuit testing; Delta-IDDQ testing; current test vector; histogram; partitioning; process drifting; settling time; test optimization; variance reduction; Current measurement; Data analysis; Filtering; Histograms; Integrated circuit testing; Leakage current; Production; Semiconductor device measurement; Solids;
Conference_Titel :
Test Conference, 2000. Proceedings. International
Conference_Location :
Atlantic City, NJ
Print_ISBN :
0-7803-6546-1
DOI :
10.1109/TEST.2000.894208