An improved fault diagnosis algorithm based on path tracing with dynamic circuit extraction

Author

Shigeta, Kazuki ; Ishiyama, Toshio

Author_Institution

Analysis Technol. Dev. Div., NEC Corp., Kawasaki, Japan

fYear

2000

fDate

2000

Firstpage

235

Lastpage

244

Abstract

We have proposed a fault diagnosis algorithm based on path tracing which dynamically extracts partial circuits and traces error propagation paths from failing primary outputs to a fault origin. Logic inference and the rating procedures are improved, so that various fault modes such as stuck-at, open and bridge faults can be diagnosed. We have shown that the improved technique localizes faults effectively in a reasonable time by applying it to several scan-based circuits: 20 K-gate benchmark circuits (ISCAS´89), and 100 K- and 2M-gate industrial circuits

Keywords

fault diagnosis; integrated circuit testing; logic testing; benchmark circuit; bridge fault; dynamical partial circuit extraction; error propagation; fault diagnosis algorithm; industrial circuit; logic inference; open fault; path tracing; rating method; scan-based circuit; stuck-at fault; Algorithm design and analysis; Bridge circuits; Circuit faults; Circuit testing; Dictionaries; Failure analysis; Fault diagnosis; Inference algorithms; Logic; National electric code;

fLanguage

English

Publisher

ieee

Conference_Titel

Test Conference, 2000. Proceedings. International

Conference_Location

Atlantic City, NJ

ISSN

1089-3539

Print_ISBN

0-7803-6546-1

Type

conf

DOI

10.1109/TEST.2000.894211

Filename

894211