Hardware-in-the-loop simulation of FPGA embedded processor based controls for power electronics

Simulating in closed loop power systems controlled by Field Programmable Gate Array (FPGA) embedded processors using digital or mixed-signal simulation tools is a very time-consuming task and does not support tracing high-level programming language instructions. The aim of this paper is to show how Hardware in the Loop simulation can be a very effective approach to perform software verification in those systems. The embedded processor core, peripherals, and the power converter model are all implemented into the same FPGA. The digital control algorithm is written in C language and runs on the FPGA embedded processor. The power converter switching model is described in synthesizable VHDL using the VHDL-2008 floating point package, which shortens the design cycle. Using the low-cost hardware and software debugging tools supplied by the FPGA vendor, current and voltages of the power converter model are monitored, and C instructions can be traced while running on the embedded processor core. The power converter VHDL model is stopped when the embedded processor core is halted by the high-level C language debugger. Results show the feasibility of this approach.