• DocumentCode
    2762937
  • Title

    A self-timed implementation of Boolean functions

  • Author

    Saarepera, Märt ; Yoneda, Tomohiro

  • Author_Institution
    Dept. of Comput. Sci., Tokyo Inst. of Technol., Japan
  • fYear
    1999
  • fDate
    1999
  • Firstpage
    243
  • Lastpage
    250
  • Abstract
    In this paper, we discuss Three-Rail coded 2-phase signaling self-timed implementation of Boolean functions by feedback-free gate networks. Delays in operating Three-Rail gates and signals associated with inputs and outputs of gates are assumed to be arbitrary but finite. We implement some Three-Rail gates by binary Boolean gates. In implemented Three-Rail gates we assume isochronic forks or equipotential regions. We show that Three-Rail gates are the smallest gates, such that the feedback-free gate networks are self-timed under 2-phase protocol. Designing Three-Rail feedback-free gate networks is as hard as designing corresponding synchronous feedback-free gate networks
  • Keywords
    Boolean functions; asynchronous circuits; delays; logic design; 2-phase protocol; Boolean functions; Three-Rail coded 2-phase signaling; Three-Rail gates; binary Boolean gates; equipotential regions; feedback-free gate networks; gate networks; isochronic forks; self-timed implementation; Boolean functions; Character generation;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Advanced Research in Asynchronous Circuits and Systems, 1999. Proceedings., Fifth International Symposium on
  • Conference_Location
    Barcelona
  • ISSN
    1522-8681
  • Print_ISBN
    0-7695-0031-5
  • Type

    conf

  • DOI
    10.1109/ASYNC.1999.761538
  • Filename
    761538