DocumentCode :
2763071
Title :
Conversion of small functional test sets of nonscan blocks to scan patterns
Author :
Ross, Don E. ; Wood, Tim ; Giles, Grady
fYear :
2000
fDate :
2000
Firstpage :
691
Lastpage :
700
Abstract :
Testing nonscan blocks of hardware such as small embedded memories (register files, etc.) can be done using existing scan chains due to the atypically small memory size. FastScan´s Macrotest has been developed to solve this problem, and the more interesting problem of concisely and accurately informing the user about the specific hardware and command constraints which prevent successful testing. This allows the user to quickly identify the particular problems, and add DFT or change the patterns to match the architectural and other restraints of the embedding
Keywords :
VLSI; automatic test pattern generation; automatic test software; integrated circuit testing; logic testing; observability; ATPG; FastScan; Macrotest; command constraints; embedded array testing; embedded memories; functional test sets conversion; nonscan blocks; register files; scan patterns; Automatic test pattern generation; Built-in self-test; Design for testability; Graphics; Hardware; Logic; Pattern matching; Registers; System testing; Throughput;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Conference, 2000. Proceedings. International
Conference_Location :
Atlantic City, NJ
ISSN :
1089-3539
Print_ISBN :
0-7803-6546-1
Type :
conf
DOI :
10.1109/TEST.2000.894264
Filename :
894264
Link To Document :
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