Title :
Logic mapping on a microprocessor
Author :
Kinra, Anjali ; Balachandran, Hari ; Thomas, Regy ; Carulli, John
Author_Institution :
Texas Instrum. Inc., Stafford, TX, USA
Abstract :
Improving debug techniques for logic failures is a constant imperative. This paper describes the results of implementing a logic mapping methodology that integrates in-line manufacturing defect data and scan-based diagnosis for a complex microprocessor. The correlation between the physical failure analysis results and defect inspection data is presented and analyzed. Methods to improve the percentage of `hits´ are explored, supported by a detailed account of challenges and obstacles encountered during the experiment. Finally, the paper also briefly highlights the amount of time that can be saved in process debug through the usage of logic mapping
Keywords :
automatic testing; computer debugging; computer testing; failure analysis; inspection; integrated circuit testing; logic testing; microprocessor chips; debug techniques; defect inspection data; in-line manufacturing defect data; logic failures; logic mapping methodology; microprocessor testing; physical failure analysis results; process debug; scan-based diagnosis; Failure analysis; Inspection; Instruments; Logic arrays; Logic devices; Microprocessors; Pulp manufacturing; Textile industry; Throughput; Time measurement;
Conference_Titel :
Test Conference, 2000. Proceedings. International
Conference_Location :
Atlantic City, NJ
Print_ISBN :
0-7803-6546-1
DOI :
10.1109/TEST.2000.894265
