Title :
Design and implementation of window delay-line ADC for low-power DC-DC SMPS
Author :
Chen, Huei-Shan ; Yang, Chun-Hung ; Tsai, Chien-Hung ; Li, Guan-Lin
Author_Institution :
Dept. of Electr. Eng., Nat. Cheng-Kung Univ., Tainan, Taiwan
Abstract :
A window delay-line analog-to-digital converter (ADC) with programmable resolutions for digitally-controlled switch-mode power supplies (SMPS) used in low-power portable applications is proposed in this paper. Due to its simple, low-power architecture and small silicon area, this ADC can be fully integrated with a digital controller. The proposed ADC quantizes the output converter voltage within a window of the reference voltage. The ADC has been fabricated in a TSMC 0.18μm CMOS technology and verified as a part of a 976.56 KHz, 3.6 to 1.2 V buck DC-DC converter.
Keywords :
CMOS integrated circuits; DC-DC power convertors; analogue-digital conversion; digital control; switched mode power supplies; CMOS technology; SMPS; TSMC; buck DC-DC converter; digitally-controlled switch-mode power supplies; frequency 976.56 kHz; low-power DC-DC SMPS; low-power portable applications; programmable resolutions; size 0.18 mum; small silicon area; voltage 3.6 V to 1.2 V; window delay-line ADC; window delay-line analog-to-digital converter; Delay; Delay lines; Registers; Switched-mode power supply; Switches; Voltage control; Voltage measurement; ADC; DC-DC converter; SMPS; delay-line; digital controller;
Conference_Titel :
Control and Modeling for Power Electronics (COMPEL), 2012 IEEE 13th Workshop on
Conference_Location :
Kyoto
Print_ISBN :
978-1-4244-9372-2
Electronic_ISBN :
1093-5142
DOI :
10.1109/COMPEL.2012.6251735
