Title :
Using erase self-detrapped effect to eliminate the flash cell program/erase cycling Vth window close
Author :
Lee, J.H. ; Peng, K.R. ; Shih, J.R. ; Chen, S.H. ; Yeh, J.K. ; Su, H.D. ; Ho, M.C. ; Kuo, D.S. ; Liew, B.K. ; Sun, Jacky C.
Author_Institution :
R&D, Taiwan Semicond. Manuf. Co., Hsin-Chu, Taiwan
Abstract :
The electrons and holes trapped in the tunneling oxide and interface states generated in the Si-SiO2 interface during program/erase (P/E) operations are known to cause reliability problems which can deteriorate the cell performance and cause Vth window closure. This deterioration is caused by the accumulation of electrons trapped in the oxide near the drain side after each P/E cycle. Although the trapped charges exist in the oxide layer during the erase operation, we find that these charges exist temporarily because the erase field eventually detraps the charges. We call this effect the erase self-detrapped effect (ESDE). In this paper, the influence of the ESDE on the cell degradation characteristics after P/E cycles is first studied. We then propose two new erase schemes to improve the cell´s endurance characteristics: (1) adding a channel erase cycle after the negative-gate erase (NGE) operation; (2) adding a channel erase cycle after the source erase (SE) operation. These two erase schemes have been implemented and shown to significantly reduce the Vth window closure problem
Keywords :
dielectric thin films; electron traps; flash memories; hole traps; integrated circuit reliability; integrated circuit testing; integrated memory circuits; interface states; tunnelling; P/E cycle; P/E cycles; Si-SiO2 interface; cell degradation characteristics; cell performance; channel erase cycle; charge detrapping; erase field; erase operation; erase schemes; erase self-detrapped effect; flash cell program/erase cycling; flash cell threshold voltage window closure; interface states; negative-gate erase operation; oxide layer; program/erase operations; reliability; source erase operation; trapped charges; trapped electron accumulation; trapped electrons; trapped holes; tunneling oxide; Charge carrier processes; Degradation; EPROM; Electron traps; Nonvolatile memory; Research and development; Semiconductor device manufacture; Sun; Threshold voltage; Tunneling;
Conference_Titel :
Reliability Physics Symposium Proceedings, 1999. 37th Annual. 1999 IEEE International
Conference_Location :
San Diego, CA
Print_ISBN :
0-7803-5220-3
DOI :
10.1109/RELPHY.1999.761587