• DocumentCode
    2764024
  • Title

    Analysis of high-speed bus lines in printed circuit boards

  • Author

    Satoh, Hidetaka ; Matsui, Norio ; Okada, Katsuyuki

  • Author_Institution
    NTT Electr. Commun. Labs., Tokyo, Japan
  • fYear
    1989
  • fDate
    26-28 Apr 1989
  • Firstpage
    294
  • Lastpage
    297
  • Abstract
    Techniques are investigated for improving the operating speed and driving capabilities of bus lines in a bookshelf-type packaging system. In particular, a parallel distributed circuit model with stubs is introduced for analyzing reflection and crosstalk noise simultaneously. Numerical analysis shows that a tradeoff exists between the upper limit of speed and the number of packages, and that the reduction of stub length will improve the tradeoff. Experiments indicate that the reduction of stub length by surface-mount bus drivers on both surfaces of a PCB is highly effective for achieving high operating speeds
  • Keywords
    circuit layout; computer interfaces; digital circuits; driver circuits; printed circuit design; surface mount technology; achieving high operating speeds; bookshelf-type packaging system; crosstalk noise; high-speed bus lines; number of packages; parallel distributed circuit model; printed circuit boards; reduction of stub length; reflection; stubs; surface-mount bus drivers on both surfaces; tradeoff; upper limit of speed; Backplanes; Capacitance; Connectors; Crosstalk; Driver circuits; Impedance; Packaging; Printed circuits; Transceivers; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronic Manufacturing Technology Symposium, 1989, Proceedings. Japan IEMT Symposium, Sixth IEEE/CHMT International
  • Conference_Location
    Nara
  • Type

    conf

  • DOI
    10.1109/IEMTS.1989.76160
  • Filename
    76160