A novel fast technique for detecting voiding damage in IC interconnects

A novel technique has been developed that is sensitive to the degree of voiding damage induced in a wide-line interconnect test structure. The technique is based on the measurement of the scattering parameters (S-parameters) of a simple metal-line test structure over a range of high frequencies. The transmission-line parameter, G (leakage conductance), which is calculated from the S-parameter measurements, is shown to be sensitive to distributed voiding, especially in wider lines. This is significant for the following reasons: (1) the measurement is fast, at a few seconds per test structure; (2) it can be performed at wafer level; (3) it does not rely on overstressing of the metallization; and (4) it is sensitive to the amount of voiding damage present in wide interconnect lines. Potential applications for this technique are: (a) an in-line statistical reliability control (SRC) test for the detection of stress voids induced during processing, and (b) an in-line SRC test for electromigration when preceded by a suitable current pre-stress step