Strained-SOI/SGOI Dual Channel CMOS Technology Based on Ge Condensation Technique

In this paper, fabrication of the dual channel CMOS devices based on the Ge-condensation technique is demonstrated as well as their mobility and current drive enhancements. Ge-rich strained SGOI pMOSFETs were integrated with strained Si/SGOI nMOSFETs by a CMOS process combined with the Ge condensation process, in which the strain in the SGOI layers were properly controlled. As a result, significant electron- and hole-mobility enhancements for the strained SOI and SGOI channels were observed as well as I_d enhancements