A novel fixed-point FFT algorithm on embedded digital signal processing systems

Embedded systems have widespread use in consumer, commercial, and military applications. Reactive and real-time are two main characteristics of these systems. As one kind of real-time embedded system, embedded digital signal processing (EDSP) systems use a special architecture to achieve better performance in DSP applications. Generally, there is no great difference between floating-point FFT and fixed-point FFT on general-purpose computer systems. However, in embedded DSP systems, the precision and range become the bottleneck of the performance of fixed-pointed FFT. In most cases, how to keep the balance of precision and real-time becomes a serious problem during the design phase of EDSP systems. We present a novel fixed-point FFT algorithm which can make designers easily adjust the precision and execution time of FFT. It is very useful to the co-design of EDSP systems. This paper also analyzes the novel algorithm from the viewpoint of round-off error analysis and presents the benchmarks on C6201