A model for channel hot carrier reliability degradation due to plasma damage in MOS devices

Author

Rangan, Sanjay ; Krishnan, Srikanth ; Amerasekara, Ajith ; Aur, Shian ; Ashok, S.

Author_Institution

Silicon Technol. Dev., Texas Instrum. Inc., Dallas, TX, USA

fYear

1999

fDate

1999

Firstpage

370

Lastpage

374

Abstract

An empirical relationship between device channel hot carrier lifetime and process induced damage has been developed, by correlating the antenna ratio (AR) to the channel hot carrier lifetime (τ) of both N- and P-MOSFETs. A 10× increase in AR results in a 7× fall in its normalized lifetime for NMOS and a 10× fall for the PMOS. A process constant P and a device constant D have been introduced. Process-related factors such as reactor design and process conditions are accounted for by P, while D includes the device features, such as gate-drain overlap and dielectric technology

Keywords

MOSFET; dielectric thin films; hot carriers; plasma materials processing; semiconductor device models; semiconductor device reliability; MOS devices; N-MOSFETs; P-MOSFETs; antenna ratio; channel hot carrier lifetime; channel hot carrier reliability degradation model; device channel hot carrier lifetime; device constant; device features; dielectric technology; gate-drain overlap; normalized lifetime; plasma damage; process conditions; process constant; process induced damage; process-related factors; reactor design; Degradation; Hot carriers; Life estimation; Lifetime estimation; MOS devices; MOSFET circuits; Plasma devices; Plasma materials processing; Plasma properties; Stress;

fLanguage

English

Publisher

ieee

Conference_Titel

Reliability Physics Symposium Proceedings, 1999. 37th Annual. 1999 IEEE International

Conference_Location

San Diego, CA

Print_ISBN

0-7803-5220-3

Type

conf

DOI

10.1109/RELPHY.1999.761641

Filename

761641