DocumentCode
2766895
Title
A systolic architecture for elliptic curve cryptosystems
Author
Tsai, Wei-Chang ; Wang, Sheng-Jyh
Author_Institution
Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
Volume
1
fYear
2000
fDate
2000
Firstpage
591
Abstract
This article presents a new systolic architecture for the main operation in an elliptic curve cryptosystem over the finite field GF(2 m). This proposed architecture is actually a finite field multiplier and is used to implement the addition operation in the elliptic curve cryptosystem. We apply a partitioning scheme and parallelize the main operation in a straightforward systolic architecture to speed up the operation and then apply merging and re-timing schemes in the partitioned architecture to future improve the performance of this architecture. We compare this architecture with some previously proposed systolic architectures for the finite field arithmetic. The comparison shows that our architecture offers the lowest hardware complexity. This architectures can be easily adopted to build a low-complexity elliptic curve cryptosystem
Keywords
Galois fields; computational complexity; digital arithmetic; public key cryptography; systolic arrays; Galois field; addition operation; data communication; elliptic curve cryptosystems; finite field; finite field arithmetic; finite field multiplier; hardware complexity; merging scheme; parallel operation; partitioned architecture; partitioning scheme; public-key cryptography; re-timing scheme; secure electronic transaction; systolic architecture; Arithmetic; Broadcasting; Computer architecture; Elliptic curve cryptography; Elliptic curves; Galois fields; Hardware; Merging; Public key cryptography; Systolic arrays;
fLanguage
English
Publisher
ieee
Conference_Titel
Signal Processing Proceedings, 2000. WCCC-ICSP 2000. 5th International Conference on
Conference_Location
Beijing
Print_ISBN
0-7803-5747-7
Type
conf
DOI
10.1109/ICOSP.2000.894560
Filename
894560
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